MediaTek's Dimensity 9600 Pro takes flagship phones to 2nm with an all-big-core CPU and two NPUs for AI agents

What MediaTek launched

MediaTek announced the Dimensity 9600 Pro in Hsinchu on 15 September 2026, its new flagship smartphone chip and its first built on a 2nm process. It launched alongside the Dimensity 9600M, a second flagship-tier chip aimed at bringing, in MediaTek's words, "flagship-level performance and power efficiency" to more users, and both join the Dimensity 9500s and Dimensity 9500 in the flagship tier that MediaTek's Dimensity family page now marks as new.

The press release pitches the 9600 Pro as a chip for the agentic AI era: a phone that runs an assistant in the background all day, reasons over on-device data and acts on the user's behalf, without the battery cost that has held that idea back. The engineering to support it is substantial. There is a new all-big-core CPU built on Arm's C2 cores, two NPUs with separate jobs, first-wave support for LPDDR6 memory and UFS 5.0 storage, H.266 video decoding, and a security layer that includes a hardware root of trust, post-quantum protection and an isolated environment for AI called AISeal.

MediaTek says the first phones using the 9600 Pro and the 9600M are expected to launch this quarter, which runs to 30 September. It has not yet named the phone makers.

The CPU: all big cores, now on Arm C2

MediaTek has used an all-big-core design, with no small efficiency cores, for several generations, and calls this its fourth. The 9600 Pro splits eight cores into a 2+3+3 layout:

• 2x Arm C2-Ultra at up to 4.55GHz, each with 2MB of L2 cache
• 3x Arm C2-Pro at 4.35GHz, each with 1MB of L2 cache
• 3x Arm C2-Pro at 3.1GHz, each with 512KB of L2 cache

Two ultra cores is the notable change. The Dimensity 9500 used a 1+3+4 arrangement with a single C1-Ultra at up to 4.21GHz, so the 9600 Pro doubles its top-tier cores and raises their peak clock speed by about 8%.

Cache grows with it. Add up the L2 cache on the 9600 Pro's specification table and you get 4 + 3 + 1.5 = 8.5MB, against 2 + 3 + 2 = 7MB on the Dimensity 9500, which is exactly the 21% larger L2 cache MediaTek advertises. With the unchanged 16MB L3 cache and 10MB of SLC system cache, the total is 34.5MB. Larger caches keep more of a workload close to the cores, which matters for the bursty, memory-hungry mix of apps and AI models MediaTek is targeting.

MediaTek says the new CPU delivers 17% higher single-core and 15% higher multi-core performance, with single-core power efficiency 37% better and multi-core power efficiency 61% better. As with every percentage in this launch, MediaTek measures these against its previous-generation Dimensity flagship, on demo devices in its own labs; independent tests on shipping phones will show how they hold up. (The press release words the multi-core figure as a 61% reduction in power consumption, which is a stronger claim than 61% better efficiency.)

The AI story: two NPUs, fused compute and faster memory

The centre of the launch is a dual-NPU architecture, and the split is the interesting part. The two processors do different jobs:

• The NPU 1090 is the heavy lifter for generative and agentic AI. MediaTek says it has double the INT4 compute of the previous generation, runs LLM prefill (reading the prompt) 51% faster and generates 55% more tokens per watt. The press release says it supports models of up to 30 billion parameters.
• The Super Efficient NPU 2.0 is built for always-on work. The product page says it gives background AI "a dedicated always-on domain", so agents can keep running without draining the battery, and MediaTek says it is 40% more power efficient than its predecessor.

Above both sits the Dimensity Agentic AI Engine, which MediaTek describes as turning AI from a passive responder into a proactive assistant that understands context and coordinates across apps. The infographic lists on-device proactive suggestion and scene detection as examples.

Around the NPUs, MediaTek has built what it calls fusion architectures. AI Compute Fusion combines the CPU and NPU under the third-generation Dimensity Scheduling Engine, which allocates compute, power and memory across tasks; MediaTek credits that pairing with 40% faster LLM token generation and 27% faster on-device AI model launch. The same idea appears in graphics (GPU and NPU) and imaging (ISP and NPU). On the model side, the 9600 Pro supports Mixture of Experts (MoE) inference and LLM compression, and the product page describes a hardware compression engine for the KV cache, the working memory a model builds up during a conversation.

Why LPDDR6 matters for token speed

The memory upgrade is the less glamorous half of the AI story, and arguably the more important one. When a model generates text, every new token means reading the model's active weights out of memory. On a phone, the processor can usually do that arithmetic faster than memory can deliver the weights, so the speed of token generation is set mainly by memory bandwidth, the gigabytes per second the memory can move, rather than by how much memory there is. This site's free Can I run AI locally tool is built on the same principle.

That is why MediaTek's two numbers belong together. The company says LPDDR6 raises effective memory bandwidth by 33% at the same frequency as LPDDR5X, and that token generation is 40% faster. A 33% bandwidth gain lifts the ceiling on memory-bound token generation by up to 33%; the remainder of the 40% has to come from elsewhere, and MediaTek attributes the figure to the Scheduling Engine and AI Compute Fusion. The model-side features help in the same direction: MoE models read only some of their weights per token, and KV-cache compression shrinks the data moved on every step.

The scale shows why this matters. A 30 billion parameter model stored at 4 bits per weight is about 15GB (30 billion multiplied by half a byte). If every weight is active, the phone reads all 15GB for each token, and bandwidth is the limit; an MoE model with a few billion active parameters reads a fraction of that. One practical point for buyers: the 9600 Pro's specification lists both LPDDR6 10667 and LPDDR5X 10667, so the bandwidth gain depends on the phone maker fitting LPDDR6. Storage follows the same logic for loading models: MediaTek says UFS 5.0 doubles read and write speed against 2-channel UFS 4.

Graphics, camera, video and connectivity

Graphics and gaming. The GPU is Arm's Mali-G2 Ultra NX. MediaTek says it delivers 27% higher peak performance, 24% better power efficiency at peak and up to 18% faster raytracing, with native gameplay at up to 185fps. A new Neural Graphics Architecture syncs the GPU directly with the NPU for AI super-resolution, and the chip supports hardware-accelerated opacity micromap (OMM) raytracing and a raytracing pipeline capable of multi-material reflections.

Camera and video. The Imagiq 1290 image processor works with the NPU through an AI Imaging Fusion Architecture. Headline features are 60fps continuous subject focus tracking, 17EV HDR video capture with LOFIC and UFCC, 4K120 cinematic LOG recording and native 4K240 slow motion, a first for Dimensity. The specification lists up to 8K60 capture and sensors up to 200MP.

Video and display. MediaTek says the 9600 Pro is the world's first smartphone processor with H.266 (VVC) hardware decoding for streaming video, alongside MV-HEVC for spatial video. The display pipeline supports BT.2020 colour end to end, WQHD+ at 180Hz, multi-frame overdrive to cut motion blur and three MIPI ports for tri-fold phones.

Connectivity. The integrated 5G modem supports five-carrier aggregation across up to 350MHz for more than 7.4Gbps downlink, with in-modem AI to cut gaming latency and triple SIM triple active support. MediaTek describes it as a 5G-Advanced modem; the specification table lists 3GPP Release 17. Wi-Fi 7 reaches up to 7.3Gbps, and Bluetooth moves to 6.2 with a dual Bluetooth engine. MediaTek's AI Connectivity Framework claims 30% better positioning accuracy and a 90% reduction in Wi-Fi roaming time.

Security built into the silicon

An always-on assistant that reads messages, recognises scenes and learns preferences holds some of the most personal data on the phone. Unlike the Dimensity 9500, 9500s and 9600M product pages, the 9600 Pro's page lists a dedicated security layer for that, under the heading "AI Privacy, Security & Quantum Attack Protection". It has three parts.

HWRoT: Hardware Root of Trust with tamper-resistant protection. NIST describes roots of trust as highly reliable components that perform critical security functions and must be secure by design. In a phone, a hardware root of trust typically anchors secure boot, so only signed code runs from power-on, protects device keys and supports attestation, where the device proves its state to a remote service.

PQC: defence against future quantum attacks. Post-quantum cryptography uses algorithms designed to resist a future quantum computer. NIST published the first three standards on 13 August 2024: ML-KEM (FIPS 203) for key establishment, and ML-DSA (FIPS 204) and SLH-DSA (FIPS 205) for signatures. Building PQC into the chip matters because the keys and signatures that verify boot code can be hard to change once hardware ships.

AISeal: hypervisor isolation for proactive AI privacy, using pKVM. pKVM is the protected hypervisor in Google's Android Virtualization Framework. It runs at the processor's EL2 privilege level and keeps protected virtual machines separate from Android itself, so that even if the main Android system is compromised it cannot read a protected VM's memory. Google already uses protected VMs on select devices for Play Protect live threat detection, and Android's documentation notes OPPO uses the framework for an AI private computing space. AISeal applies that isolation to proactive AI, which is the right place for it.

MediaTek has not yet published the detail behind these features: which post-quantum algorithms are used and where, which AI workloads run inside AISeal, and whether that protected environment can be attested to apps or device management. Android's security documentation also notes that pKVM protects against a compromised Android host, while the chip and phone makers remain trusted parties. Buyers who plan to rely on these features should ask phone makers for those details.

The line-up: 9600 Pro, 9600M and 9500s

The table below is built from each chip's own MediaTek product page. "Not stated" means that page does not say.

MediaTek's current flagship tier, from the Dimensity 9600 Pro, 9600M and 9500s product pages, read 17 September 2026.

Item	9600 Pro	9600M	9500s
Process	2nm	Not stated	3nm
CPU	2x C2-Ultra, 3x C2-Pro, 3x C2-Pro	1x C1-Ultra, 3x C1-Premium, 4x C1-Pro	1x Cortex-X925, 3x Cortex-X4, 4x Cortex-A720
Cache: L2, L3, SLC	8.5, 16, 10MB	7, 16, 10MB	7, 12, 10MB
GPU	Mali-G2 Ultra NX	Mali-G1 Ultra MC12	Immortalis-G925
NPU	NPU 1090 and Super Efficient NPU 2.0	NPU 990 and a compute-in-memory NPU	MediaTek NPU, not named
Memory	LPDDR6 or LPDDR5X, 10667	LPDDR5X 10667	LPDDR5X, up to 10667
Storage	UFS 5.0	UFS 4.1, 4-lane	UFS 4 with MCQ
Modem	R17, 5CC 350MHz, triple SIM	R17, 5CC 350MHz, dual SIM	R17, 4CC 300MHz, dual SIM
Max gaming frame rate	185fps	185fps	165fps
Bluetooth	6.2	6.0	5.4
HWRoT, PQC, AISeal	Stated	Not stated	Not stated
First phones	This quarter	This quarter	Not stated

The 9600 Pro is the new halo chip and the only one of the three with the C2 cores, LPDDR6, UFS 5.0 and the security layer. The 9600M is positioned one step down: its product page describes it as built with 9600 Pro platform technologies, and its published hardware specification closely matches the Dimensity 9500's, from the C1-Ultra CPU and caches to the NPU 990, Mali-G1 Ultra GPU and 4-lane UFS 4.1. What it adds is the newer software stack, including Dimensity Scheduling Engine 3.0 and support for Gemini Nano 4 and Qwen 3.5 Omni 4B. Carrying proven flagship silicon into a more accessible tier with updated software is a familiar pattern in the phone chip market, and it typically gives phone makers a mature platform for more affordable flagship models.

The 9500s sits alongside them on 3nm with an Arm Cortex-X925, X4 and A720 CPU, an Immortalis-G925 GPU and 165fps gaming, pitched by MediaTek on efficiency under the tagline "The Power to Outlast".

The market: 2nm arrives in flagship Android

MediaTek describes itself as the world's number one provider of mobile chipsets, and the 9600 Pro is its bid to lead the flagship Android tier on process as well as volume. The move to 2nm has been trailed for a year. In September 2025, MediaTek announced it had taped out a flagship chip on TSMC's enhanced N2P process, with volume production and the first N2P chipset expected in late 2026. It quoted TSMC's figures for N2P against N3E of up to 18% more performance at the same power, about 36% less power at the same speed and 1.2 times the logic density. The 9600 Pro release does not name the foundry, but its 2nm claim links back to that announcement. The Dimensity 9500 was built on TSMC N3P.

The launch rhythm is annual. The Dimensity 9500 was announced on 22 September 2025, with flagship phones expected in the fourth quarter of 2025, and its product page now features the OPPO Find X9 and vivo X300 series. The 9600 Pro arrives 358 days later with a faster timeline: phones this quarter. If that holds, phone launches and independent benchmarks should follow within weeks.

Beyond the chip itself, the 9600 Pro is a signal for the wider supply chain. First-wave LPDDR6 and UFS 5.0 support in a flagship Android chip helps pull those memory and storage standards into phones, and the security layer puts post-quantum protection and hypervisor-isolated AI on a flagship specification sheet.

What it means for UK businesses and IT teams

Chips like the 9600 Pro make it realistic to move more AI work from the cloud onto the phone: summarising, drafting, transcribing and searching personal data without sending it to a server. That can simplify data residency and reduce exposure to third-party AI services. It also brings always-on agents into the organisation's fleet, and those agents observe what staff do. The ICO lists artificial intelligence and machine learning among its examples of innovative technology that can call for a data protection impact assessment, and the NCSC's post-quantum migration timeline asks organisations to identify, by 2028, any need to migrate long-lived hardware roots of trust.

Key facts