P.K. SHARMA

Cyber security intelligence, AI governance, practitioner analysis

AMD's Threadripper Halo Station can run a trillion-parameter model, on the configuration that was not in the case

576GB of HBM3E, 16 TB/s and the trillion-parameter claim all describe four accelerators. The machine demonstrated at IFA had two, and the arithmetic is checkable.

By Parminder Kumar Sharma · · 8 min read

A loose coil of clear liquid-cooling tubing with polished metal compression fittings resting on a matte charcoal surface, lit by a cold rim light so the coolant glows faintly through the tube walls.

AMD opened the IFA keynote in Berlin with the Threadripper Halo Station, announced by Jack Huynh, the company's senior vice president and general manager for computing and graphics. It is a liquid-cooled tower built around a 96-core Threadripper Pro 9995WX and AMD Instinct MI350P accelerators, aimed at local AI inference and development.

It is being written up as a personal supercomputer that runs trillion-parameter models on a desk. That is close to right, and three of the numbers in the headline version describe a machine that was not on the stage.

The Threadripper Halo Station on a plinth at AMD's IFA 2026 keynote: a tower workstation with a tempered glass side panel, its interior lit, standing on a branded display block.
The Threadripper Halo Station as shown at IFA 2026. Still from AMD's keynote broadcast, reproduced for comment. Source: AMD.

The three numbers, and which machine they belong to

The specification circulating is 576GB of HBM3E, 16 TB/s of memory bandwidth, and up to four MI350P accelerators.

Each MI350P carries 144GB of HBM3E at 4 TB/s. So 576GB is four of them, and 16 TB/s is four of them. AMD's own description is that the base configuration ships with two accelerators and that there is "a path to" four.

Close-up through the glass side panel of the Threadripper Halo Station. Two accelerator cards are mounted horizontally one above the other, each with liquid cooling lines attached, beneath a smaller card in the topmost slot and a liquid-cooled processor block above that. Two accelerators are visible and no others are installed.
The same machine, closer. Count the accelerators: there are two, each with its own coolant lines, with a small networking card in the slot above them. The 576GB and 16 TB/s figures describe four. Still from AMD's keynote broadcast, reproduced for comment. Source: AMD.

The system demonstrated in Berlin had two. Which makes the machine that was shown a 288GB, 8 TB/s workstation, and the machine in the headline a configuration AMD has described but not demonstrated, priced, or committed to selling.

Does it run a trillion-parameter model?

A trillion parameters, and what was on the stage

A TRILLION PARAMETERS, AND WHAT WAS ON THE STAGEWeights only, which is generous to the claim. Add a KV cache and every bar gets longer.0GB500GB1000GB1500GB2000GB288GB as demonstrated576GB, a path to four, not shownA trillion parameters at BF162 bytes per parameter2000GBA trillion parameters at FP81 byte per parameter1000GBA trillion parameters at MXFP40.5 bytes per parameter500GBThe claim holds at four-bit precision, on a four-accelerator machine. The one on the stage had two.576GB, 16 TB/s and the trillion-parameter line all describe the same configuration AMD did not demonstrate.
None of this makes the claim untrue. MI350P supports MXFP4 natively, so four bits is a reasonable working assumption rather than a stretch, and 500GB of weights genuinely does fit in 576GB. The two conditions are simply missing from the sentence: the quantisation, and the two accelerators that were not in the case.
Weights only, at 2 bytes per parameter for BF16, 1 byte for FP8 and 0.5 bytes for MXFP4. Memory thresholds are 144GB per MI350P as published by AMD. Add a KV cache and every bar gets longer.

Do the arithmetic, because it is arithmetic anyone can check.

A trillion parameters at BF16 is about 2,000GB of weights. At FP8 it is 1,000GB. At MXFP4, which the MI350P supports natively, it is about 500GB.

Five hundred gigabytes fits inside 576GB, with 76GB left for the KV cache and activations. So the claim is true, at four-bit precision, on the four-accelerator machine.

On the two-accelerator machine that was actually demonstrated, 288GB does not hold a trillion parameters at any precision AMD supports. You would need to be below roughly 2.3 bits per parameter.

None of that makes AMD wrong. MXFP4 is a reasonable working assumption for inference on this hardware, and it is one of the reasons the accelerator exists. The two conditions are simply absent from the sentence: the quantisation, and the two accelerators that were not in the case.

What was actually in the case

The Threadripper Halo Station as demonstrated, and as described

ComponentSpecificationShown, or described
CPUThreadripper Pro 9995WX, 96 cores, 192 threads, Zen 5, 5.4GHz boost, 384MB L3, 350WShown, and stated without an “up to”
AcceleratorsInstinct MI350P, CDNA 4 on TSMC 3nm, 128 compute units, 600W TBP eachTwo shown. Four described as “a path to”
Accelerator memory144GB HBM3E each at 4 TB/s288GB and 8 TB/s shown. 576GB and 16 TB/s described
System memoryUp to 2TB DDR5 across eight channelsCapacity stated. No speed given during the presentation
CoolingLiquid-cooled CPU and both acceleratorsShown, and the first liquid-cooled MI350P seen anywhere
MotherboardASUS Pro WS WRX90E-SAGE SE, a retail partShown. This is a commercial off-the-shelf build
Cooling designSeparate closed-loop radiators per processorShown. Not a shared engineered loop
Price, date, OS, storage, PSUNone announcedNot stated
Specifications from AMD's IFA 2026 presentation and AMD's published MI350P documentation. The right column separates what was shown in Berlin from what AMD has described as possible.

The cooling detail is the one that tells you where this product is. AMD used a separate closed-loop cooler on each processor rather than a single engineered loop across the system. Combined with a retail ASUS motherboard, that is a demonstration assembled from parts on the shelf rather than a designed product.

It also marks a genuine first. MI350P shipped as an air-cooled card for standard PCIe servers, and a 600W card in a desktop tower needs something else, so liquid-cooled MI350P had not been seen before this.

The word "personal"

Nobody has announced a price. The parts have prices.

A Threadripper Pro 9995WX runs somewhere around $11,000 to $12,000 when you can find one. MI350P accelerators are not sold through consumer channels, with estimates near $20,000 each. Two terabytes of DDR5 costs roughly $50,000 at current memory prices.

That is about $100,000 of components for the configuration that was demonstrated, before the chassis, the board, the storage, the networking card or any margin. The four-accelerator version adds around $40,000 more.

For calibration, a Lenovo ThinkStation P8 configured with 2TB of DDR5 and two accelerators lists at $334,463.

So "personal supercomputer" is accurate in the sense that it sits under a desk and one person uses it. It is not personal in the sense that a person buys one.

Why it matters anyway

The dismissive reading would be that this is a parts list with a name, and that reading is wrong.

The interesting thing is the strategy. NVIDIA's DGX Station puts a single B300 and a Grace CPU module in a desktop. AMD's answer uses multiple accelerators on PCIe cards, which is a different bet: more aggregate memory, at the cost of the coherent single-package design NVIDIA gets. For local inference on very large models, aggregate HBM capacity is frequently the binding constraint, and 576GB is a lot of it.

The second thing is that this sits above the Ryzen AI Halo, the small Strix Halo box AMD shipped earlier this year. AMD is now building a ladder of local AI development hardware rather than a single product, and it put Microsoft on stage alongside it with the Project Zenith developer toolkit. That is a platform play, and platform plays are usually more consequential than any single machine.

Take this with you

If you are evaluating this

  • Ask which configuration any quoted figure refers to. 576GB, 16 TB/s and the trillion-parameter claim all describe four accelerators. The demonstrated machine had two.
  • Ask what precision the model claim assumes. At MXFP4 the arithmetic works on a four-accelerator box. At FP8 a trillion parameters does not fit even in 576GB.
  • Do not plan around it yet. There is no price, no release date, no operating system, no storage configuration and no power supply announced.
  • Note that the demonstration was assembled from retail parts, including an ASUS WRX90 motherboard and separate closed-loop coolers per chip. That is a proof of concept, not a shipping design.
  • Budget the memory separately. Two terabytes of DDR5 is roughly half the component cost at current prices, and memory pricing is moving faster than anything else in the bill of materials.
  • If you are comparing against NVIDIA DGX Station, compare aggregate accelerator memory rather than headline compute. That is the axis on which the two designs actually differ.

The position

AMD demonstrated a real machine and described a bigger one, and the coverage has merged them.

Everything in the headline is achievable and nothing in it is a fabrication. The 9995WX was stated flatly, with no hedging, and it is a genuinely extraordinary processor. The MI350P numbers are AMD's published specifications. Four accelerators at 144GB each really is 576GB, and 576GB really will hold a trillion four-bit parameters.

The gap is between a specification and a demonstration, and the useful habit for hardware launches is exactly the one for security claims: ask which configuration the number belongs to, and whether anyone has seen it work.

On this occasion, two of four accelerators were in the case, and the rest was a sentence.

Sources

  1. PrimaryAMD Instinct MI350 series product documentation: 144GB HBM3E per accelerator at 4 TB/s, CDNA 4 on TSMC 3nm, 128 compute units, 600W total board power and native MXFP4 supportAMDaccessed 2026-09-05
  2. PrimaryAMD Ryzen Threadripper PRO 9000 WX series: the 9995WX at 96 cores and 192 threads, 5.4GHz boost, 384MB L3, 350W, eight DDR5 channels and 128 PCIe Gen5 lanesAMDaccessed 2026-09-05
  3. PrimaryIFA 2026, Berlin, where AMD announced the Threadripper Halo Station during its opening keynoteIFA Berlinaccessed 2026-09-05

Share this briefing

Know someone who owns this problem? Send it to them.

Related briefings

The briefing, in your inbox

Practitioner analysis of cyber and AI security news. No vendor noise.

One email per briefing. Unsubscribe any time.